Epitaxial Layer in CMOS: How It Shapes Pixel Sensor Performance

In a CMOS device the epitaxial layer is a thin, lightly doped p-type silicon film grown on a heavily doped p++ substrate; in CMOS pixel sensors it is typically 10 to 30 μm thick. Transistors sit in wells on top of it. In a monolithic pixel sensor it is also the sensitive volume: charge freed by a passing particle diffuses inside it until a collecting diode picks it up.

Updated October 2026: current sensor examples and corrected references.

The same structure helps ordinary CMOS logic. Devices built in a lightly doped epitaxial layer on a heavily doped substrate are less prone to latch-up, because excess minority carriers recombine quickly in the heavily doped silicon.

CMOS Monolithic Active Pixel Sensors (MAPS) are charged particle tracking devices, integrating on the same silicon substrate a radiation sensitive detector element with its front-end readout electronics. Standard microelectronics CAD tools are used for their design and modern submicron or deep submicron commercial CMOS processes for the fabrication.

After production the device is directly ready to be employed without any use of complicated and expensive post processing like bump-bonding. Initially all prototypes of Monolithic Pixel Sensors were fabricated using a CMOS process version providing an epitaxial type of substrate. In this substrate type a thin (about 10 μm) lightly p-doped silicon epitaxial layer is grown on a heavily p++ doped, much thicker (several hundred μm) supporting structure.

On top of the epitaxial layer, structures of n+ and p+ wells are formed, providing the surface for CMOS transistor implantation (Fig.1).

In the original MAPS implementation, this epitaxial layer is used as a detector radiation sensitive volume, with a diode Nwell/Pepi working as a charge collecting element [1]. The detector is only partially depleted in the vicinity of the Nwell/Pepi junction (1-2 μm in depth), so the charge is collected mainly through a thermal diffusion mechanism. However due to the particular doping profile (P++substrate/P-epi/P+well), there is a potential minimum in the middle of the epitaxy limiting the volume spread of diffusing electrons created by the radiation absorption.

These electrons may move only along the plane parallel to the surface and are rapidly collected when passing close to the collecting diode junction, with a typical collection time of the order of 100 ns. The detector active volume is limited in depth to the epitaxy layer only, because of the short minority carrier lifetime inside a p++ substrate.

Therefore the charge available from an impinging minimum ionizing particle is small: for an epitaxial layer about 10 μm thick the most probable signal is roughly 500 to 600 electrons, and the mean about 1,000, against more than 20,000 in a 300 μm sensor. Thin layers also widen the signal distribution, as explained in energy straggling in silicon. Several epitaxial CMOS processes have been used in the past, providing MAPS with rather outstanding MIP tracking performances.

Around 2010 several MAPS prototypes were fabricated without an epitaxial layer, on a high resistivity substrate. The cross section of such a substrate is shown in Fig.1. In this case a supporting silicon wafer is uniformly p doped and is directly used as such for nwells and pwells implantation.

There is no potential minimum in the bulk, therefore a larger charge spread is anticipated. Unlike the epitaxial substrate type, the sensitive region has no clear limit in depth, and this increases the total charge collected on the nwell/psubstrate diode, compensating for the larger spread.

Where the epitaxial layer stands today

Large detectors kept the epitaxial layer and changed its resistivity. The ALPIDE sensor of the ALICE Inner Tracking System, installed during the LHC Long Shutdown 2 (2019 to 2022), uses a high resistivity epitaxial layer (above 1 kΩ·cm, typically 18 to 30 μm thick) on a p-type substrate [6]. A reverse bias applied to the substrate enlarges the depleted volume around the collection diodes and lowers their capacitance, and the high resistivity also improves radiation tolerance. The general design of these CMOS active pixel sensors is the same as above.

References

1. D. Passeri et al., Characterization of CMOS Active Pixel Sensors for particle detection: beam test of the four sensors RAPS03 stacked system, Nucl. Instr. and Meth. A 617 (2010) 573-575
2. D. Passeri et al., Tilted CMOS Active Pixel Sensors for Particle Track Reconstruction, IEEE Nucl. Sci. Symp. Conf. Rec. NSS09 (2009) 1678.
3. L. Servoli et al., Use of a standard CMOS imager as position detector for charged particles, Nucl. Phys. B (Proc. Suppl.) 215 (2011) 228-231, doi:10.1016/j.nuclphysbps.2011.04.016
4. D. Biagetti et al., Beam test results for the RAPS03 non-epitaxial CMOS active pixel sensor, Nucl. Instr. and Meth. A 628 (2011) 230-233
5. Silicon pixel detectors for high precision measurements, PhD Thesis, Universita di Perugia, Italy (2012)
6. ALICE Collaboration, ALICE upgrades during the LHC Long Shutdown 2, JINST 19 (2024) P05062, arXiv:2302.01238